The present invention relates generally to materials used in phase change memory, and more specifically, to methods of reducing a resistivity drift in phase change memory material.
The dimension of a memory cell holding binary-digit (bit) information has been decreased dramatically and is approaching the limits of lithography capability. To further increase data density, phase change materials (PCM) have been proposed to hold multi-bit information in one memory cell. Among many PCMs, chalcogenide Ge2Sb2Te5 (GST) has been studied because of its fast and reversible transition between crystalline and amorphous phases in which resistances of GST differ by about three orders of magnitude. Although programmed resistances of an amorphous GST in a memory cell are initially well separated, the resistivity of an amorphous GST increases with time according to a power law. This resistivity drift makes it difficult to retrieve information stored according to cell resistivity.